This invention relates to a manufacturing technique of a semiconductor integrated circuit device, particularly to a technique effective when adapted to the manufacture of a semiconductor integrated circuit device having a MISFET equipped with a metal gate electrode.
Japanese Patent Application Laid-Open No. SHO 59(1984)-132136 (Kobayashi, et al., corresponding to U.S. Pat. No. 4,505,028) discloses a technique wherein a gate electrode of a metal structure is formed from a W film (or Mo film) on a Si (silicon) substrate and then, the resulting electrode is oxidized in a mixed atmosphere of water vapor and hydrogen, whereby only Si is selectively oxidized without oxidizing the W (Mo) film. This technique makes use of the fact that a water vapor/hydrogen partial pressure ratio at which the redox reaction is in equilibrium is different between W (Mo) and Si. Selective oxidation of Si is actualized by setting this partial pressure ratio within a range permitting the reduction of W (Mo) but oxidation of Si.
Japanese Patent Application Laid-Open No. HEI 7(1995)-94716 (Muraoka, et al.) discloses a technique wherein a gate electrode of a polymetal structure including a metal nitride layer such as TiN and a metal layer such as W is formed over an Si substrate via a gate oxidized film and then, the resulting substrate is oxidized in a reducing gas (hydrogen)+oxidizing gas (vapor vapor) atmosphere diluted with nitrogen. According to it, only Si can be selectively oxidized without oxidation of the metal layer and at the same time, oxidation of the metal nitride layer can be prevented, because denitrification from the metal nitride layer can be prevented by diluting the water vapor+hydrogen gas mixture with nitrogen.
Japanese Patent Application Laid-Open No. SHO 60(1985)-160667 (Agatsuma) discloses a technique wherein a thin film made of a refractory metal such as W or Mo is formed over a silicon substrate and then, the resulting substrate is heat treated in a non-oxidizing atmosphere to diffuse oxygen occluded in the thin film to the surface of the substrate, whereby an extremely thin silicon oxide film is formed on the interface between them.
(1) A CMOS-LSI having a circuit formed from a MISFET having a gate length as minute as 0.18 xcexcm or less is required to have a gate electrode formed using a metal-containing low-resistance conductive material in order to lower gate delay even upon operation at low voltage, thereby maintaining high-speed operation.
A composite conductive film (which will hereinafter be called xe2x80x9cpolymetalxe2x80x9d) having a refractory metal film stacked over a polycrystalline silicon film ha s been regarded promising as such a low-resistance gate electrode material. The polymetal can be used not only as a gate electrode material but also as an interconnection material, because it has a sheet resistance as low as about 2 xcexa9/xe2x96xa1. As the refractory metal, W (tungsten), Mo (molybdenum), Ti (titanium) or the like which exhibits good low resistance even in a low temperature process of 800xc2x0 C. or less and at the same time, has high electromigration resistance can be employed. Direct stacking of such a refractory metal film on a polycrystalline silicon film, however, causes inconveniences such as lowering in their adhesive forces a nd formation of a high-resistance silicide layer on the interface between them upon high-temperature heat treatment process. Accordingly, an industrially used polymetal gate is constituted of three layers having, between a polycrystalline silicon film and a refractory metal film, a conductive barrier film made of a metal nitride film such as TiN (titanium nitride) or WN (tungsten nitride).
(2) With a view to setting the threshold voltage (Vth) of a CMOS-LSI having a circuit formed from a MISFET having a gate length as minute as 0.18 xcexcm or less at a low level for satisfying a tendency to low-voltage operation, a so-called dual gate structure wherein a polycrystalline silicon film partially constituting a polymetal gate has a n-type conductivity for the n-channel type MISFET and p-type conductivity for the p-channel type MISFET tends to be adopted. In this structure, the gate electrode of the n-channel type MISFET has a refractory metal film stacked on the n-type polycrystalline silicon film doped with n type impurities such as P (phosphorus), while that of the p-channel type MISFET has a refractory metal film stacked on the p-type polycrystalline film doped with p type impurities such as B (boron).
The CMOS-LSI as described above in (1) is however accompanied with the problem that when the gate length of the MISFET becomes not greater than 0.18 xcexcm, a two-layer structure having a refractory metal film stacked on a polycrystalline silicon film or a three-layer structure having a conductive barrier film formed therebetween inevitably has a markedly increased aspect ratio, which makes processing of the gate electrode difficult.
The CMOS-LSI as described above in (2) is on the other hand accompanied with the problem that B (boron) in the p-type polycrystalline silicon film partially constituting the gate electrode of the p-channel type MISFET is diffused through the gate oxide film to the side of the substrate and changes the flat band voltage (Vfb) of the p-channel type MISFET, thereby causing a fluctuation in the threshold voltage (Vth).
A so-called metal gate electrode having a refractory metal film such as W or Mo directly formed on a gate oxide film without disposing therebetween an intermediate layer such as polycrystalline silicon film is therefore under development for avoiding the above-described problems.
In order to actualize high velocity and high performance of a MISFET, it is necessary to reduce the film thickness of a gate oxide film in proportion to the miniaturization of the MISFET. For example, a MISFET having a gate length of about 0.25 xcexcm to 0.2 xcexcm needs a gate oxide film having a film thickness thinner than 5 nm.
When the film thickness of the gate oxide film is reduced to 5 nm or less, however, lowering in the withstand voltage due to generation of a direct tunnel current or hot carriers induced from a stress becomes apparent. In addition, direct formation of a refractory metal film such as W or Mo over such a thin gate oxide film causes defects in the gate oxide film in the vicinity of the interface between them, thereby reducing the withstand voltage.
Since the defects of the gate oxide film mainly result from the oxygen deficiency of an Sixe2x80x94O bond, it is possible to repair the defects by heat treating the substrate in an oxidizing atmosphere, thereby supplying the oxygen-deficient portion with oxygen. The heat treatment of the substrate in an oxidizing atmosphere, however, causes simultaneous oxidation of a refractory metal film which is a gate electrode material deposited over a gate oxide film and inevitably increases the resistance of a gate insulating film.
In order to prevent a reduction in the withstand voltage due to a thinning tendency of a gate oxide film, it is considered as one countermeasure to use, as a gate insulating film material, an insulating-metal oxide such as tantalum oxide having a dielectric constant larger than silicon oxide, thereby increasing its effective thickness.
Such an insulating metal oxide is a crystalline material so that a step of heat treating it in an oxygen atmosphere after film formation to supply the film with oxygen is indispensable for obtaining its original insulation properties. Heat treatment of the substrate in an oxidizing atmosphere, however, increases the resistance of the gate insulating film, because a refractory metal film, which is a gate electrode material deposited over the gate insulating film, is oxidized at the same time.
An object of the present invention is therefore to provide a technique for improving the reliability and production yield of a MISFET having a metal gate electrode formed over an ultra-thin gate insulating film.
Another object of the present invention is to provide a technique for improving the reliability and production yield of a MISFET having a metal gate electrode formed over a gate insulating film containing a metal oxide having a higher dielectric constant than silicon oxide.
A further object of the present invention is to provide a process for forming a gate insulating film having a film thickness less than 5 nm in terms of SiO2.
A still further object of the present invention is to provide a process for repairing the defect of a gate insulating film having a film thickness less than 5 nm in terms of SiO2.
The above-described and the other objects and novel features of the present invention will be apparent from the description herein and accompanying drawings.
Among the inventions disclosed by the present application, summaries of the typical ones will next be described briefly.
In the method for manufacturing a semiconductor integrated circuit device according to the present invention, by forming a refractory metal film, which is to be a gate electrode, over a gate insulating film formed over the main surface of a silicon substrate and having a thickness less than 5 nm in terms of SiO2 and then heat treating the silicon substrate in a water vapor+hydrogen mixed gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidization of the refractory metal, defects of the gate insulating film rightly under the refractory metal film are repaired.
The summary of the inventions according to the present application other than the above-described one will next be described in items.
1. A method for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and made of a single insulating film containing silicon oxide as a principal component or a composite film thereof with another insulating film;
(b) forming, on the gate insulating film, a metal film containing a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component and then patterning the metal film to form a metal gate electrode; and
(c) heat treating the first main surface having the metal gate electrode formed thereover in a water-vapor and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the metal gate electrode.
2. The method as described above in 1, wherein the refractory metal is molybdenum or tungsten.
3. The method as described above in 1 or 2, wherein the gate insulating film has a film thickness less than 4 nm in terms of SiO2.
4. The method as described above in 1 or 2, wherein the gate insulating film has a film thickness less than 3 nm in terms of SiO2.
5. A method for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and made of a single insulating film containing silicon nitride as a principal component or a composite film thereof with another insulating film;
(b) forming, over the gate insulating film, a metal film containing a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component and then patterning the metal film to form a metal gate electrode; and
(c) heat treating the first main surface having the metal gate electrode formed thereover in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the metal gate electrode.
6. The method as described above in 5, wherein the refractory metal is molybdenum or tungsten.
7. The method as described above in 5 or 6, wherein the water vapor+hydrogen mixed gas further contains a nitrogen or ammonia gas.
8. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and made of a single insulating film containing as a principal component a metal oxide having a dielectric constant larger than silicon dioxide or a composite film thereof with another insulating film;
(b) forming, thereover, a metal film having a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component and then patterning the metal film to form a metal gate electrode; and
(c) heat treating the first main surface having the metal gate electrode formed thereover in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing the defects in the gate insulating film rightly under the metal gate electrode.
9. The method as described above in 8, wherein the metal constituting the metal oxide film is titanium, zirconium or hafnium.
10. The method as described above in 8, wherein the metal constituting the metal oxide film is tantalum.
11. The method as described above in 8, wherein the metal constituting the metal oxide film is aluminum.
12. The method as described above in 8, wherein the metal oxide film is a high dielectric substance including a ABO3 type average perovskite structure and is in a paraelectric phase at an operating temperature.
13. The method as described above in 12, wherein the high dielectric substance is BST.
14. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a first film containing, as a principal component, a first refractory metal having a redox equilibrium curve in a water-vapor- and hydrogen-containing gas atmosphere on the lower water vapor side than that of silicon;
(b) heat treating the first main surface having the first film formed thereover in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting the oxidation of the first refractory metal without substantial oxidation of the silicon surface, thereby converting the first refractory metal to the oxide thereof, whereby forming a gate insulating film over the first main surface; and
(c) forming a gate electrode before or after the step (b).
15. The process as described above in 14, wherein the first refractory metal is titanium, zirconium or hafnium.
16. The process as described above in 14 or 15, wherein the water-vapor- and hydrogen-containing gas atmosphere in the step (b) is formed by synthesizing water vapor in the presence of a catalyst.
17. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a gate insulating film containing, as a principal component, an oxide of a first refractory metal having a redox equilibrium curve in a water-vapor and hydrogen-containing gas atmosphere on the lower water vapor side than that of silicon;
(b) heat treating the first main surface having the gate insulating film formed thereover in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting the oxidation of the first refractory metal without substantial oxidation of the silicon surface, thereby converting the first refractory metal to the oxide thereof, whereby defects in the gate insulating film are repaired; and
(c) forming a gate electrode over the gate insulating film before or after the step (b).
18. The process as described above in 17, wherein the gate insulating film in the step (a) is formed over the silicon surface via a silicon oxide film.
19. The process as described above in 17 or 18, wherein the first refractory metal is titanium, zirconium or hafnium.
20. The process as described above in any one of 17, 18 and 19, wherein the water-vapor- and hydrogen-containing gas atmosphere in the step (b) is formed by synthesizing water vapor in the presence of a catalyst.
21. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) patterning a metal film having a first refractory metal, which has a redox equilibrium curve in a water-vapor- and hydrogen-containing gas atmosphere on the side of a higher water vapor than that of silicon, as a principal component, thereby forming a gate electrode over silicon surface on the first main surface of a wafer; and
(b) heat treating the first main surface having the gate electrode formed thereover, thereby forming a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and containing, as a principal component, silicon oxide over the silicon surface rightly under the gate electrode and.
22. The process as described above in 21, wherein the first refractory metal is molybdenum or tungsten.
23. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a first film to be a gate insulating film, which contains, as a principal component, a first refractory metal having a redox equilibrium curve in a water-vapor- and hydrogen-containing gas atmosphere on the lower water vapor side than that of silicon;
(b) forming, over the first main surface having the first film formed thereover, a second film to be a gate electrode containing as a principal component, a second refractory metal having the redox equilibrium curve on the higher water vapor side than that of silicon;
(c) patterning the first and second films, thereby forming the gate electrode; and
(d) heat treating the first main surface having the gate electrode formed thereover and oxidizing the first film rightly under the gate electrode, thereby converting the first into the gate insulating film.
24. The process as described above in 23, wherein the second refractory metal is molybdenum or tungsten.
25. The process as described above in 23, wherein the first refractory metal is titanium, zirconium or hafnium.
26. A semiconductor integrated circuit device comprising:
(a) a semiconductor integrated circuit substrate having a silicon surface on the first main surface;
(b) a gate insulating film containing, as a principal component, a binary oxide or multi-element oxide containing zirconium oxide and hafnium oxide or containing at least two of zirconium oxide, hafnium oxide and titanium oxide, respectively; and
(c) a gate electrode disposed over the gate insulating film.
27. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the silicon surface on the first main surface of a wafer, a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and made of a single insulating film containing silicon oxide as a principal component or a composite film thereof with another insulating film;
(b) forming, over the gate insulating film, a conductive barrier film;
(c) forming, over the barrier film, a metal film containing a first refractory metal as a main component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component;
(d) patterning the barrier film and the metal film to form a gate electrode; and
(d) heat treating the first main surface having the gate electrode formed thereover in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the gate electrode.
28. The process as described above in 27, wherein the first refractory metal is tungsten.
29. The process as described above in 27 or 28, wherein the conductive barrier film contains titanium nitride as a principal component.
30. The process as described above in any one of 27, 28 and 29, wherein the water-vapor- and hydrogen-containing gas further contains a nitrogen or ammonia gas.
31. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the main surface of a silicon substrate, a gate insulating film having a film thickness less than 5 nm in terms of SiO2;
(b) forming, over the gate insulating film, a metal film containing as a principal component a refractory metal and heat treating the main surface of the silicon substrate having the metal film formed thereover in a water-vapor and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the metal film; and
(c) patterning the metal film, thereby forming a metal gate electrode.
32. The process as described above in 31, wherein the gate insulating film contains silicon oxide as a principal component.
33. The process as described above in 32, wherein the gate insulating film is formed by thermal oxidation of the main surface of the silicon substrate in a water-vapor- and oxygen-containing gas atmosphere synthesized in the presence of a catalyst.
34. The process as described above in 31, wherein the gate insulating film contains silicon oxynitride as a principal component.
35. The process as described above in 34, wherein the gate insulating film is formed by forming a silicon oxide film on the surface of the substrate and then heat treating the substrate in a nitrogen-gas-containing atmosphere.
36. The process as described above in 31, wherein the gate insulating film contains silicon nitride as a principal component.
37. The process as described above in 36, wherein the gate insulating film is formed by deposition of a silicon nitride film over the substrate by CVD.
38. The process as described above in any one of 31 to 37, wherein the refractory metal is molybdenum or tungsten.
39. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the main surface of a silicon substrate, a gate insulating film having a film thickness less than 5 nm in terms of SiO2,
(b) forming, over the gate insulating film, a metal film containing a refractory metal as a principal component via a conductive barrier film made of a nitride of a refractory metal and heat treating the main surface of the silicon substrate, which has thereover the metal film and the conductive barrier film formed, in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the conductive barrier film; and
(c) patterning the metal film and the conductive barrier film, thereby forming a metal gate electrode.
40. The process as described above in 39, wherein the refractory metal constituting the conductive barrier film is molybdenum or tungsten.
41. The process as described above in 39, wherein the refractory metal constituting the conductive barrier film is titanium.
42. The process as described above in 41, wherein the water vapor concentration of the water-vapor- and hydrogen-containing gas atmosphere is not greater than 1%.
43. The process as described above in 41, wherein the water-vapor- and hydrogen-containing gas atmosphere further contains nitrogen or ammonia.
44. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the main surface of a silicon substrate, a gate insulating film having a film thickness less than 5 nm in terms of SiO2 and being made of a metal oxide having a dielectric constant larger than silicon dioxide;
(b) forming, over the gate insulating film, a metal film containing as a principal component a refractory metal and heat treating the main surface of the silicon substrate, over which the metal oxide has been formed, in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal, thereby repairing defects in the gate insulating film rightly under the metal film; and
(c) patterning the metal film, thereby forming a metal gate electrode before or after the step for repairing defects in the gate insulating step.
45. The process as described above in 44, wherein the refractory metal is molybdenum or tungsten.
46. The process as described above in 44 or 45, wherein the metal oxide is titanium oxide, zirconium oxide, hafnium oxide, tantalum oxide, aluminum oxide or BST.
47. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the main surface of a silicon substrate, a film of a first refractory metal;
(b) forming, over the film of a first refractory metal, a metal film containing as a principal component a second refractory metal, and heat treating the substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting the oxidation of the first refractory metal without substantial oxidation of the second refractory metal, thereby converting the first refractory metal into the oxide thereof, whereby a gate insulating film having a film thickness less than 5 nm in terms of SiO2 is formed over the surface of the silicon substrate; and
(c) patterning the metal film, thereby forming a metal gate electrode before or after the heat treatment step.
48. The process as described above in 47, wherein the refractory metal is molybdenum or tungsten.
49. The process as described above in 47 or 48, wherein the refractory metal is titanium, zirconium, hafnium or tantalum.
50. A process for manufacturing a semiconductor integrated circuit device, which comprises the following steps:
(a) forming, over the main surface of a silicon substrate, a film of a refractory metal and heat treating the substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio not permitting the substantial oxidation of the film of a refractory metal, thereby forming a gate insulating film having a film thickness less than 5 nm in terms of SiO2 over the interface between the substrate and the film of a refractory metal; and
(c) patterning the film of a refractory metal, thereby forming a metal gate electrode before or after the heat treatment step.
51. The process as described above in 50, wherein the refractory metal is molybdenum or tungsten.
52. The process as described above in any one of 31 to 51, wherein the gate insulating film has a film thickness less than 4 nm in terms of SiO2.
53. The process as described above in any one of 31 to 52, wherein the gate insulating film has a film thickness less than 3 nm in terms of SiO2.
54. The process as described above in any one of 31 to 53, wherein the gate insulating film has a film thickness ranging from 1.5 nm to 2 nm in terms of SiO2.
55. The process as described above in any one of 31 to 54, wherein the metal gate electrode has a gate length not greater than 0.25 xcexcm.
56. The process as described above in any one of 31 to 55, wherein the metal gate electrode has a gate length not greater than 0.18 xcexcm.
57. The process as described above in any one of 31 to 56, wherein the metal gate electrode has a gate length not greater than 0.1 xcexcm.